1. Field
The following description relates to an over-drivable output buffer, a source driver circuit having the same, and methods thereof, and more particularly, to an output buffer which is able to provide an output signal over-driven greater than or less than a target voltage to a display panel, a source driver circuit having the same, and methods for an output buffer and source driver circuit.
2. Description of Related Art
In general, a flat panel display apparatus includes a display panel on which a plurality of unit pixels for displaying an image are arranged, a gate driver circuit to drive gate lines of the display panel, and a source driver circuit to provide display data, to data lines of the display panel and display the data as an image. If display data of a predetermined bit is provided to the source driver circuit, the source driver circuit provides an output signal having a predetermined target value to drive the unit pixels to the display panel within one horizontal period (1H), such that the image is displayed on the display panel.
As the size of display panels increases and display definition increases, a target voltage of the output signal, which is provided to the display panel by the source driver circuit, increases. In other words, as the size of the display panel increases and the display definition increases, a load resistance and a capacitance of a load capacitor connected to an output terminal of the source driver circuit increase, and accordingly the target voltage of the output signal increases.
Therefore, due to the increased capacity of the output load caused by the increased size and definition of the display panel, a resistance-capacitive (RC) delay of the output load becomes larger than a slew rate of the output buffer of the source driver circuit. The slew rate is the maximum rate of change of a signal at any point in a circuit. Therefore, even if the output signal of the target voltage provided from the output buffer is provided to the unit pixels of the display panel, the pixel load of each unit pixel is not able to reach a desired target value within a desired time. In other words, in the case in which the load resistance and the load capacitance of the source driver, used in a display element having a large panel and a high definition, are great and the 1H is relatively small, the RC delay is so large that the unit pixels cannot reach the voltage of a desired target value within a desired time, even if the slew rate of the output buffer is high. Therefore, a desired image may not be displayed on the display panel.